In typical consumer electronics equipment, one or more 27 MHz crystals or voltage controlled crystal oscillators (VCXO) are used to drive audio and video interface Phase Lock Loop (PLL) circuits when undertaking clock recovery and/or media timestamp functions. In this usage, a low frequency signal (27 MHz) is used by the PLL to generate higher frequency signals (pixel clock, audio bit clock, etc.) The PLL's output clock has a permanent rational (M/N) relationship with the input, that is N clocks of 27 MHz always generates M clocks of the output signal. However, PLL circuitry requires considerable die area. Industry has responded with much smaller numerically controlled oscillators (NCOs) which accept a much higher input frequency (above 1 GHz) and generate interface signals directly. But NCOs do not provide the related lower-frequency (27 MHz) clock used by software for the purposes of media timing and clock recovery.